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02 082 6 ? by semikron b 14 C 4 monitor memory buffer error input vs vs +15v 0v 10,11 1 8,9 vs 5v level 15v input vin reset error 2 4 3 output buffer irgoff - 8v dc/dc converter vs +15v isolation 3 rgoff goff e 2 1 monitoring turn-off soft vce j2 rce cce rgon sc rgoff vce gon 5 blo ck d i a g r a m skhi 1 0 j1 pr i m ar y s i d e s e c ondar y s i de 12 3 4 5 6 7 8 9 10 j3 selector 1 0 w fig.1 the numbers refer to the description on page 4, section b. 4.5 4.5 rgoff-sc rgoff rgon 124 irgoff input level 12 4x3.5 1314 input connector j1 66 connector output j2 1 3 2 5 cce rce error logic j3 0 w fig.2 dimensions (in mm) and connections of the skhi 10 input connector = 14 pin flat cable according to din 41651 output connector = molex 41791 series (mates with 41695 crimp terminal housing and crimp terminals 7258)
02 082 6 ? by semikron b 14 C 5 semidriver ? skhi 10 semidriver ? skhi 10/17 high power single igbt driver general the intelligent single igbt driver, SKHI10 respectively skhi 10/17 is a standard driver for all power igbts on the market. the high power output capability was designed to switch high current modules or several paralleled igbts even for high frequency applications. the output buffer has been improved to make it possible to switch up to 400a igbt modules at frequencies up to 20khz. a new function has been added to the short circuit protecti- on circuitry (soft turn off), this automatically increases the igbt turn off time and hence reduces the dc voltage overvoltage spikes, enabling the use of higher dc-bus voltages. this means an increase in the final output power. an integrated dc/dc converter with high galvanic isolation (4 kv) ensures that the user is protected from the high voltage (secondary side). the power supplies for the driver may be the same as used in the control board (0/+15v) without the requirement of isolation. all information that is transmitted between input and output uses ferrite transformers, resulting in high dv/dt immunity (75kv/ m s). the driver input stage is connected directly to the control board output and due to different control board operating voltages the SKHI10s input circuit includes a user voltage level selector (+15v or +5v). in the following only the designation skhi 10 is used. this is valid for both driver versions. if something is to be explained special to skhi 10/17 it will be descriped by marking skhi 10/17. a. features and configuration of the driver a short description is given below. for detailed information, please refer to section b. a) the SKHI10 has an input level selector circuit which is adusted by j1 for two different levels. it is present for cmos (15v) level, but can be changed by the user to hcmos (5v) level by solder bridging the pads marked j1 together. for long input cables, we do not recommend the 5v level due to possible disturban- ces emitted by the power side. b) the error memory blocks the transmission of all turn-on signals to the igbt if either a short circuit or malfunction of v s is detected, and sends a signal to the external control board through an open collector transi- stor. c) with a ferrite transformer the information be- tween primary and secondary may flow in both directi- ons and high levels of dv/dt and isolation are obtained. d) a high frequency dc/dc converter avoids the requirement of external isolated power supplies to ob- tain the necessary gate voltage. an isolated ferrite transformer in half-bridge configuration supplies the necessary power to the gate of the igbt. with this feature, we can use the same power supply used in the external control circuit, even if we are using more than one SKHI10, e.g. in h-bridge configurations. e) short circuit protection is provided by measuring the collector-emitter voltage with a v ce monitoring circuit. an additional circuit detects the short circuit after a delay (determined by r ce ,c ce ) and decreases the turn off speed (adjusted by r goff -sc) of the igbt. soft turn-off under fault conditions is necessary as it reduces the voltage overshoot and allows for a faster turn off during normal operation. f) the output buffer is responsible for providing the correct current to the gate of the igbt. if these signals do not have sufficient power, the igbt will not switch properly, and additional losses or even the destruction of the igbt may occur. according to the application (switching frequency and gate charge of the igbt) the equivalent value of r gon and the r goff must be matched to the optimum value. this can be done by putting additional parallel resistors r gon , r goff with those alrea- dy on the board. if only one igbt is to be used, (instead of parallel connection) only one cable could be con- nected between driver and gate by soldering the two j2 areas together. fig.1 shows a simplified block diagram of the SKHI10 driver. some preliminary remarks will help the under- standing: regulated +15v must be present between pins 8,9 (v s ) and 10,11 ( ^ ); an input signal (on or off command to the igbts) from the control system is supplied to pin 2 (v in ) where high=on and low=off. pin 5 (v ce ) at secondary side is normally connected to the collector of the igbt to monitor v ce , but for initial tests without connecting the igbt it must be connected to pin 1 (e) to avoid error signal and enable the output signals to be measured. the reset input must be connected to 0v to enable the v in signal. if it is left opened, the driver will be blocked. to monitor the error signal, a pull-up resistor must be provided between pin 3 (error) and v s . b. description of the circuit block diagram (fig. 1) the circuit in fig. 1 shows the input on the left and output on the right (primary/secondary). 1. input level circuit this circuit was designed to accept two different logic voltage levels. the standard level is +15v (factory adjusted) intended for noisy environments or when long connections (l > 50 cm) between the external control circuit and SKHI10 are used, where noise immunity must be considerate. for
02 08 2 6 ? by semikron b 14 C 6
02 08 2 6 ? by semikron b 14 C 7 5. pulse transformer it transmits the turn-on and turn-off signals to the igbt. in the reverse direction the error signal from the v ce monitoring is transmitted via the same transformer. the isolation is 4 kv. 6. dc/dc converter in the primary side of the converter, a half-bridge inverter transfers the necessary energy from vs to the secondary of a ferrite transformer. in the secondary side, a full bridge and filters convert the high frequency signal coming from the primary to dc levels (+15v/- 8v) that are stabilised by a voltage regulator circuit. 7. output buffer the output buffer is supplied by the +15v/- 8v from the dc/dc converter. if the operation proceeds normally (no fault), the on- and off-signal is transmitted to the gate of an igbt through r gon and r goff . the output stage has a mosfet pair that is able to source/sink up to 8a peak current to/from the gate improving the turn-on/off time of the igbt. additionally, we can select i rgoff (see fig. 2) either to discharge the gate capacitance with a voltage source (standard) or with a current source, specially design for the 1700v igbt series (it speeds up the turn-off time of the igbt). the present factory setting is voltage source (i rgoff = 0 w ). using the current source i rgoff , r goff must be 0 w . fig.6 v ceref waveform with parameters r ce , c ce 8. soft turn-off in case of short-circuit, a further circuit (soft turn-off) increases the resistance in series with r goff and turns-off the igbt at a lower speed. this produces a smaller voltage spike (due lstray x di/dt) above the dc link by reducing the di/dt value. because in short-circuit conditions the ho- mogeneous igbts peak current increases up to 8 times the nominal current (up to 10 times with epitaxial igbt structures), and some stray inductance is ever present in power circuits, it must fall to zero in a longer time than at normal operation. this soft turn-off time can be reduced by connecting a parallel resistor r goff -sc (see fig. 2) with those already on the printed circuit board. 9. v ce monitoring this circuit is responsible for short-circuit sensing. due to the direct measurement of v cestat on the igbts collector, it blocks the output buffer (through the soft turn-off circuit) in case of short-circuit and sends a signal to the error memory on the primary side. the recognition of which v ce level must be considered as a short circuit event, is adjusted by r ce and c ce (see fig. 2), and it depends of the igbt used. typical values r ce =18k w and c ce =330 pf for skhi 10 are delivered from factory (fig. 6, curve 2). using skhi 10/17 the driver will be delivered with r ce = 36 k w and c ce = 470 pf from factory. the v ceref is not static but a dynamic reference which has an exponential shape starting at about 15v and decreases to v cestat (5v < v cestat < 10v determinated by r ce ), with a time constant t (0,5 m s < t < 1ms controlled by c ce ). the v cestat must be adjusted to remain above v cesat in normal operation (the igbt is already in full saturation). to avoid a false failure indication when the igbt just starts to conduct (v cesat value is still too high) some decay time must be provided for the v ceref . as the v ce signal is internally limited at 10v, the decay time of v ceref must reach this level after v ce or a failure indication will occur (see fig.6, curve 1). a t min is defined as function of v cestat and t to find out the best choice for r ce and v ce (see fig.6, curve 2). the time the igbt come to the 10v (represented by a ,, o in fig. 6) depends on the igbt itself and r gon used. the r ce and c ce values can be found from fig. 7 by taking the v cestat and t min as input values with following remarks: r ce > 10k w c ce < 2,7nf attention! : if this function is not used, for example during the experimental phase, the v ce monitoring must be connected with the emitter output to avoid possible fault indication and consequent gate signal blocking. 10. r gon , r goff these two resistors are responsible for the switching speed of each igbt. as an igbt has input capacitance (varying during the switching time) which must be charged and discharged, both resistors will dictate what time must be taken to do this. the final value of resistance is difficult to predict, because it depends on many parameters, as fol- lows: dc-link voltage stray inductance of the circuit switching frequency type of igbt c. operating procedure 1. one igbt connection to realize the correct switching and short-circuit monitoring of one igbt some additional external components must be used (fig.8). the driver is delivered with four r g resistors (43 w ). this value can be reduced to use the driver with bigger modules or higher frequencies/lower voltages, by putting additional resistors in parallel to the existing ones. 3 2 1 1 3 5 7 9 sec 18 14 10 6 2 volt rce=100k w cce=1nf rce=18k w cce=330pf rce=10k w cce=10pf v cestat1 v ce v cesat igbt turn-on v ceref = f(rce,cce) t min1 t min2 v cestat2
020 82 6 ? by semikron b 14 C 8 fig.7a t min as function of r ce and c ce the outputs g on and g off were previewed to connect the driver with more than one igbt (paralleling). in that case we need both signals on/off separately to connect addi- tional external resistors r gon and r goff for each igbt. if only one igbt is to be used, we suggest to connect both points together through j2 (see fig. 1 and 2). this can be done by soldering the two small pads together, which saves one external connection. typical component values: *) sk-igbt-module r gon r goff c ce r ce i rgoff ww pf k ww skm 75gal123d 22 22 330 18 0 skm 100gal(r)123d 15 15 330 18 0 skm 150gal(r)123d 12 12 330 18 0 skm 200ga(l/r)123d 10 10 330 18 0 skm 300ga(l/r)123d 8,2 8,2 330 18 0 skm 400ga123d 6,8 6,8 330 18 0 skm 500ga123d 5,6 5,6 330 18 0 table 2a 1200v igbt@ dc-link< 700v sk-igbt-module r gon r goff c ce r ce i rgoff ww pf k ww skm 200gal173d 8,2 8,2 470 36 0 skm 300ga173d 6,8 6,8 470 36 0 skm 400ga173 5,6 5,6 470 36 0 table 2b 1700v igbt@ dc-link< 1000v *) only starting values, for final optimization. the adjustment of r goffsc (factory adjusted r goffsc = 22 w ) should be done observing the overvoltages at the module in case of short circuit. when having a low inductive dc-link the module can be switched off faster. the values shown should be considered as standard values for a mechanical/electrical assembly, with ac- ceptable stray inductance level, using only one igbt per SKHI10 driver. the final optimized value can be found only by measuring. 2. paralleling igbts the parallel connection is recommended only by using igbts with homogeneous structure (ight), that have a positive temperature coefficient resulting in a perfect cur- rent sharing without any external auxiliary element. after all some care must be considered to reach an optimized circuit and to obtain the total performance of the igbt (fig. 9). the igbts must have independent values of r gon and r goff . an auxiliary emitter resistor r e as well as an auxiliary collector resistor r c must also be used. the external resistors r gonx , r goffx , r ex and r cx should be mounted on an additional circuit board near the paralleled modules, and the r gon /r goff on the driver should be changed to zero ohms. the r ex assumes a value of 0,5 w and its function is to compensate the wiring resistance in the auxiliary emitters what could make the emitter voltage against ground unba- lanced. the r cx assumes a value of 47 w and its function is to create an average value of v cesat in case of short circuit for v ce 0.1 1 10 100 0 20 40 60 80 100 t min rce 100pf 220pf 330pf 470pf 1nf sec cce w k 1 10 0 20 40 60 80 100 k v stat rce w volts cont ro l board control gnd sk hi 1 0 +15v 10,11 3 4 input connector 2 3 1 j2 5 output connector cce rce rgon rgoff rgoff-sc irgoff 2k7 w l < 50c m as sho r t as pos si b l e fig. 7b v cestat as function of r ce fig. 8 preferred standard circuit
02 082 6 ? by semikron b 14 C 9
02 0 82 6 ? by semikron b 14 C 10 0 20 40 60 80 100 0 2 4 6 8 10 f max q g c khz 9,6c not allowed area fig.13 effect of r goff -sc in short - circuit v=250a/div v=200v/div h=1s/div isc=860a 100ohm 22ohm v =1200v ce vpeak=1360v vpeak=1280v retically reach 100khz. for bigger modules or even paral- leled modules, the maximum frequency must be determi- nate (fig. 14). q g is the total equivalent gate charge connected to the output of the driver. the maximum allo- wed value is limited (9,6 m c), and depends on the output internal capacitance connected to the power supply (ener- gy storage capacitance). e. application / handling 1. the cmos inputs of the driver are extremely sensitive to overvoltage. voltages higher than (v s + 0,3 v) or under - 0,3 v may destroy these inputs. therefore the following safety requirements are to be ob- served: to make sure that the control signals do not comprise overvoltages exceeding the above values. protection against static discharges during handling. as long as the hybrid driver is not completely assembled the input terminals must be short circuited. persons working with cmos devices should wear a grounded bracelet. any floor coverings must not be chargeable. for transportation the input terminals must be short circuited using, for example, conductive rubber. places of work must be grounded. the same foam require- ments apply to the igbts. 2. the connecting leads between the driver and the power module must be as short as possible, and should be twisted. 3. any parasitic inductance should be minimized. over- voltages may be damped by c or rcd snubber networks between the main terminals [3] = c1 (+) and [2] = e2 (-) of the power module. 4. when first operating a newly developed circuit, low collector voltage and load current should be used in the beginning. these values should be increased gradually, observing the turn-off behavior of the free-wheeling diodes and the turn-off voltage spikes across the igbt by means of an oscilloscope. also the case temperature of the power module should be monitored. when the circuit works cor- rectly, short circuit tests can be made, starting again with low collector voltage. 5. it is important to feed any error back to the control circuit to switch the equipment off immediately in such events. repeated turn-on of the igbt into a short circuit, with a frequency of several khz, may destroy the device. for further details ask semikron nr.11224040 fig.14 maximum operating frequency x gate charge

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